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April 16, 2007, at 03:50 PM by 81.188.94.80 -
March 26, 2007, at 02:45 PM by 81.188.94.80 -
March 20, 2007, at 10:09 AM by 81.188.94.80 -
Changed line 4 from:

(:cell bgcolor=#cccc99:) link

to:

(:cell bgcolor=#cccc99:) Link

March 20, 2007, at 10:06 AM by 81.188.94.80 -
Changed lines 10-12 from:

(:cellb gcolor=#cccc99:) Memory Speed

to:

(:cell bgcolor=#cccc99:) Memory Speed

March 20, 2007, at 10:05 AM by 81.188.94.80 -
Changed lines 10-12 from:

(:cellbgcolor=#cccc99:) Memory Speed

to:

(:cellb gcolor=#cccc99:) Memory Speed

March 20, 2007, at 10:02 AM by 81.188.94.80 -
Changed lines 5-12 from:

(:cell:) CPU Slot (:cell:) Cpu model (:cell:) CpU speed (:cell:) CPU Bus (:cell:) Memory Type (:cell:) Memory Speed

to:

(:cell bgcolor=#cccc99:) CPU Slot (:cell bgcolor=#cccc99:) Cpu model (:cell bgcolor=#cccc99:) CpU speed (:cell bgcolor=#cccc99:) CPU Bus (:cell bgcolor=#cccc99:) Memory Type (:cellbgcolor=#cccc99:) Memory Speed

March 20, 2007, at 10:00 AM by 81.188.94.80 -
Changed lines 3-4 from:

(:cell:) Motherboard (:cell:) link

to:

(:cell bgcolor=#cccc99:) Motherboard (:cell bgcolor=#cccc99:) link

March 20, 2007, at 09:57 AM by 81.188.94.80 -
Changed line 134 from:

(:cell:)

to:

(:cell:) D915GMH

Changed line 149 from:

(:cell:) DQ965CO

to:

(:cell:) DQ965CO

Changed line 168 from:

(:cell:) DQ965GF

to:

(:cell:) DQ965GF

Changed line 198 from:

(:cell:) pos600

to:

(:cell:) pos600

Changed line 210 from:

(:cell:) Pos605

to:

(:cell:) Pos605

March 20, 2007, at 09:55 AM by 81.188.94.80 -
Changed line 30 from:

(:cell:) SE440BX2

to:

(:cell:) SE440BX2

Changed line 47 from:

(:cell:) MS-6163

to:

(:cell:) MS-6163

Changed line 60 from:

(:cell:) ca810

to:

(:cell:) ca810

Changed line 74 from:

(:cell:) D815EEA

to:

(:cell:) D815EEA

Changed line 87 from:

(:cell:) d845gvsr

to:

(:cell:) d845gvsr

Changed line 102 from:

(:cell:) D845GERG2

to:

(:cell:) D845GERG2

Changed line 116 from:

(:cell:) D865PERL

to:

(:cell:) D865PERL

Changed line 134 from:

(:cell:) D915GMH

to:

(:cell:)

March 20, 2007, at 09:52 AM by 81.188.94.80 -
Changed line 14 from:

(:cell:) SE440BX http://www.intel.com/support/motherboards/desktop/SE440BX/

to:

(:cell:) SE440BX

March 20, 2007, at 09:50 AM by 81.188.94.80 -
Changed line 14 from:

(:cell:) SE440BX

to:

(:cell:) SE440BX http://www.intel.com/support/motherboards/desktop/SE440BX/

March 20, 2007, at 09:48 AM by 81.188.94.80 -
Changed lines 265-266 from:

(:cell:) Socket 479 mPGA

to:

(:cell:) Socket 479 mPGA

March 20, 2007, at 09:48 AM by 81.188.94.80 -
Changed lines 61-62 from:

(:cell:) socket 370 PPGA

to:

(:cell:) socket 370 PPGA

Changed lines 75-76 from:

(:cell:) socket 370 PPGA

to:

(:cell:) socket 370 PPGA

Changed lines 88-89 from:

(:cell:) Socket 478 mPGA

to:

(:cell:) Socket 478 mPGA

Changed lines 103-104 from:

(:cell:) Socket 478 mPGA

to:

(:cell:) Socket 478 mPGA

Changed lines 117-118 from:

(:cell:) Socket 478 mPGA

to:

(:cell:) Socket 478 mPGA

Changed lines 135-136 from:

(:cell:) LGA775 (socket T)

to:

(:cell:) LGA775 (socket T)

Changed lines 150-151 from:

(:cell:) LGA775 (socket T)

to:

(:cell:) LGA775 (socket T)

Changed lines 169-170 from:

(:cell:) LGA775 (socket T)

to:

(:cell:) LGA775 (socket T)

Changed lines 199-200 from:

(:cell:) socket 370 PPGA

to:

(:cell:) socket 370 PPGA

Changed lines 211-212 from:

(:cell:) socket 370 PPGA

to:

(:cell:) socket 370 PPGA

Changed lines 221-222 from:

(:cellnr:)IBM surepos 4840-541

to:

(:cellnr:)IBM surepos 4840-541

Changed lines 232-233 from:

(:cellnr:)IBM surepos 4840-543

to:

(:cellnr:)IBM surepos 4840-543

March 20, 2007, at 09:46 AM by 81.188.94.80 -
Changed lines 11-12 from:

(:cell:) Latest Bios

to:
Changed lines 24-27 from:

(:cell:) P11

to:
Changed line 43 from:

(:cell:) 4S4EB2X0.86A.0024.P17

to:
Changed line 57 from:

(:cell:) 2,7

to:
Changed line 70 from:

(:cell:) P12

to:
Changed line 82 from:

(:cell:) P11

to:
Changed line 95 from:

(:cell:) VA84510A.86A

to:
Changed line 109 from:

(:cell:) RG84510A.86A.0033.P17.EB

to:
Changed lines 114-122 from:

(:cell:) Pentium 4 Celeron D Celeron (:cell:) 1,6 -2,4Ghz 2,26 -3,06Ghz 2,0 - 2,8 Ghz (:cell:) 800/533/400 Mhz 533 Mhz 400 Mhz

to:

(:cell:) Pentium 4
Celeron D
Celeron
(:cell:) 1,6 -2,4Ghz
2,26 -3,06Ghz
2,0 - 2,8 Ghz
(:cell:) 800/533/400 Mhz
533 Mhz
400 Mhz

Changed line 125 from:

(:cell:) RL86510A.86A.0089.P21

to:
Changed lines 131-137 from:

(:cell:) Pentium 4 celeron D (:cell:) 2,66 - 3,8 Ghz 2,13 - 3,6 Ghz (:cell:) 800/533 Mhz 533 Mhz (:cell:) DDR SDRAM

to:

(:cell:) Pentium 4
celeron D
(:cell:) 2,66 - 3,8 Ghz
2,13 - 3,6 Ghz
(:cell:) 800/533 Mhz
533 Mhz
(:cell:) DDR SDRAM

Changed lines 139-140 from:

(:cell:) 482

to:
Changed lines 145-152 from:

(:cell:) Core2duo Pentium D Pentium 4 Celeron (:cell:) 1,8 - 2,66 Ghz 2,66 - 3,6 Ghz 2,66 - 3,8 Ghz 2,4 - 3,46 Ghz

to:

(:cell:) Core2duo
Pentium D
Pentium 4
Celeron
(:cell:) 1,8 - 2,66 Ghz
2,66 - 3,6 Ghz
2,66 - 3,8 Ghz
2,4 - 3,46 Ghz

Changed line 156 from:

(:cell:) .

to:
Changed lines 163-170 from:

(:cell:) Core2duo Pentium D Pentium 4 Celeron (:cell:) 1,8 - 2,66 Ghz 2,66 - 3,6 Ghz 2,66 - 3,8 Ghz 2,4 - 3,46 Ghz

to:

(:cell:) Core2duo
Pentium D
Pentium 4
Celeron
(:cell:) 1,8 - 2,66 Ghz
2,66 - 3,6 Ghz
2,66 - 3,8 Ghz
2,4 - 3,46 Ghz

Changed line 174 from:

(:cell:) .

to:
Changed line 187 from:

(:cell:) .

to:
Changed lines 192-193 from:

(:cell:) PIII Celeron

to:

(:cell:) PIII
Celeron

Changed line 198 from:

(:cell:) .

to:
Changed lines 203-204 from:

(:cell:) PIII Celeron

to:

(:cell:) PIII
Celeron

Changed line 209 from:

(:cell:) .

to:
Added lines 219-221:

(:cellnr:)IBM surepos 4840-543

Deleted lines 222-223:

(:cellnr:)IBM surepos 4840-543

Deleted line 223:

(:cell:) .

Changed lines 229-230 from:

(:cell:) .

to:
Added lines 239-241:

(:cellnr:)Tec - St71

Deleted lines 242-243:

(:cellnr:)Tec - St71

Deleted line 243:

(:cell:) .

Added lines 249-251:

(:cellnr:)Ncr

Deleted lines 252-254:

(:cellnr:)Ncr (:cell:) .

Changed lines 259-260 from:

(:cell:) .

to:
March 20, 2007, at 09:40 AM by 81.188.94.80 -
Changed lines 32-34 from:

(:cell:) Pentium III Pentium II Celeron

to:

(:cell:) Pentium III
Pentium II
Celeron

Changed lines 36-37 from:

233 - 450 Mhz
266 - 433 Mhz

to:

233 - 450 Mhz
266 - 433 Mhz

Changed lines 49-54 from:

(:cell:) Pentium II Celeron (:cell:) 233 - 450 mhz 233 - 450 mhz (:cell:) 133mhz 133 Mhz

to:

(:cell:) Pentium II
Celeron
(:cell:) 233 - 450 mhz
233 - 450 mhz
(:cell:) 133mhz
133 Mhz

Changed lines 62-67 from:

(:cell:) Pentium III Celeron (:cell:) 500 - 850 Mhz 366 - 700 Mhz (:cell:) 100 Mhz 66 Mhz

to:

(:cell:) Pentium III
Celeron
(:cell:) 500 - 850 Mhz
366 - 700 Mhz
(:cell:) 100 Mhz
66 Mhz

Changed lines 75-78 from:

(:cell:) Pentium III Celeron (:cell:) 500 - 1000 Mhz 500 - 800 Mhz

to:

(:cell:) Pentium III
Celeron
(:cell:) 500 - 1000 Mhz
500 - 800 Mhz

Changed lines 87-92 from:

(:cell:) Pentium 4 Celeron D (:cell:) 1,4 - 3,6 Ghz 2,3 - 3,6 Ghz (:cell:) 533/400 Mhz 533 Mhz

to:

(:cell:) Pentium 4
Celeron D
(:cell:) 1,4 - 3,6 Ghz
2,3 - 3,6 Ghz
(:cell:) 533/400 Mhz
533 Mhz

Changed lines 101-106 from:

(:cell:) Pentium 4 Celeron (:cell:) 1,4 - 3,06 Ghz 1,7 - 2,8 Ghz (:cell:) 533/400 Mhz 400 Mhz

to:

(:cell:) Pentium 4
Celeron
(:cell:) 1,4 - 3,06 Ghz
1,7 - 2,8 Ghz
(:cell:) 533/400 Mhz
400 Mhz

March 20, 2007, at 09:37 AM by 81.188.94.80 -
Changed lines 36-37 from:
 233 - 450 Mhz          
266 - 433 Mhz
to:

233 - 450 Mhz
266 - 433 Mhz

March 20, 2007, at 09:36 AM by 81.188.94.80 -
Changed lines 35-37 from:

(:cell:) 450 - 850 Mhz
233 - 450 Mhz
266 - 433 Mhz

to:

(:cell:) 450 - 850 Mhz

 233 - 450 Mhz          
266 - 433 Mhz
Changed lines 39-40 from:


133 Mhz
133 Mhz

to:

133 Mhz
133 Mhz

March 20, 2007, at 09:32 AM by 81.188.94.80 -
Changed lines 36-37 from:

233 - 450 Mhz
266 - 433 Mhz

to:


233 - 450 Mhz
266 - 433 Mhz

Changed lines 39-40 from:

133 Mhz 133 Mhz

to:


133 Mhz
133 Mhz

March 20, 2007, at 09:31 AM by 81.188.94.80 -
Changed lines 36-37 from:

233 - 450 Mhz 266 - 433 Mhz

to:

233 - 450 Mhz
266 - 433 Mhz

March 20, 2007, at 09:30 AM by 81.188.94.80 -
Added line 140:
Changed line 156 from:

(:cell:)

to:

(:cell:) .

Changed lines 228-229 from:

(:cell:) 266 Mhz

to:

(:cell:) 266 Mhz (:cell:) .

March 20, 2007, at 09:28 AM by 81.188.94.80 -
Changed line 173 from:

(:cell:)

to:

(:cell:) .

Changed lines 179-180 from:

(:cell:) (:cell:)

to:

(:cell:) . (:cell:) .

Changed line 186 from:

(:cell:)

to:

(:cell:) .

Changed line 193 from:

(:cell:)

to:

(:cell:) .

Changed line 197 from:

(:cell:)

to:

(:cell:) .

Changed line 204 from:

(:cell:)

to:

(:cell:) .

Changed line 208 from:

(:cell:)

to:

(:cell:) .

Changed lines 211-212 from:

(:cell:) (:cell:)

to:

(:cell:) . (:cell:) .

Changed line 215 from:

(:cell:)

to:

(:cell:) .

Changed lines 218-219 from:

(:cell:)

to:

(:cell:) .

Changed lines 221-222 from:

(:cell:) (:cell:)

to:

(:cell:) . (:cell:) .

Changed line 225 from:

(:cell:)

to:

(:cell:) .

Changed lines 230-231 from:

(:cell:) (:cell:)

to:

(:cell:) . (:cell:) .

Changed lines 233-234 from:

(:cell:) (:cell:)

to:

(:cell:) . (:cell:) .

Changed lines 236-238 from:

(:cell:) (:cell:)

to:

(:cell:) . (:cell:) .

Changed lines 240-241 from:

(:cell:) (:cell:)

to:

(:cell:) . (:cell:) .

Changed line 244 from:

(:cell:)

to:

(:cell:) .

Deleted lines 246-248:

(:cell:)

(:cellnr:)Ncr

Added lines 248-250:

(:cellnr:)Ncr (:cell:) .

March 20, 2007, at 09:27 AM by 81.188.94.80 -
Changed lines 248-249 from:
 (:cellnr:)Ncr
to:

(:cellnr:)Ncr

March 20, 2007, at 09:26 AM by 81.188.94.80 -
Changed lines 248-249 from:

(:cellnr:)Ncr (:cell:)

to:
 (:cellnr:)Ncr

(:cell:) .

Changed line 253 from:

(:cell:)

to:

(:cell:) .

Changed lines 256-257 from:

(:cell:)

to:

(:cell:) .

March 20, 2007, at 09:26 AM by 81.188.94.80 -
Changed line 110 from:
			Celeron	1,7 - 2,8 Ghz				
to:
Added line 192:

Celeron

Changed line 198 from:
			Celeron					
to:
Added line 203:

Celeron

Changed line 209 from:
			Celeron					
to:
March 20, 2007, at 09:23 AM by 81.188.94.80 -
Changed lines 49-50 from:

(:cell:) Pentium II

to:

(:cell:) Pentium II Celeron

Added line 52:

233 - 450 mhz

Added line 54:

133 Mhz

Changed line 58 from:
			Celeron	233 - 450 mhz	133 Mhz			
to:
Changed lines 62-63 from:

(:cell:) Pentium III

to:

(:cell:) Pentium III Celeron

Added lines 65-68:

366 - 700 Mhz (:cell:) 100 Mhz 66 Mhz (:cell:) 168 pin Dimm

Deleted lines 69-70:

(:cell:) 168 pin Dimm (:cell:) 100 Mhz

Changed line 71 from:
			Celeron	366 - 700 Mhz	66 Mhz			
to:
Added line 76:

Celeron

Added line 78:

500 - 800 Mhz

Changed line 83 from:
			Celeron	500 - 800 Mhz				
to:
Added line 88:

Celeron D

Added line 90:

2,3 - 3,6 Ghz

Added line 92:

533 Mhz

Changed lines 96-97 from:
			Celeron D	2,3 - 3,6 Ghz	533 Mhz			
			Celeron	1,7 - 2,8 Ghz	400 Mhz			
to:
Added line 102:

Celeron

Added line 104:

1,7 - 2,8 Ghz

Added line 106:

400 Mhz

Added lines 115-116:

Celeron D Celeron

Added lines 118-119:

2,26 -3,06Ghz 2,0 - 2,8 Ghz

Added lines 121-122:

533 Mhz 400 Mhz

Changed lines 126-127 from:
			Celeron D	2,26 -3,06Ghz	533 Mhz			
			Celeron	2,0 - 2,8 Ghz	400 Mhz			
to:
Added line 132:

celeron D

Added line 134:

2,13 - 3,6 Ghz

Added line 136:

533 Mhz

Changed line 140 from:
			celeron D	2,13 - 3,6 Ghz	533 Mhz			
to:
Added lines 145-147:

Pentium D Pentium 4 Celeron

Added lines 149-151:

2,66 - 3,6 Ghz 2,66 - 3,8 Ghz 2,4 - 3,46 Ghz

Changed lines 156-158 from:
			Pentium D	2,66 - 3,6 Ghz				
			Pentium 4	2,66 - 3,8 Ghz				
			Celeron	2,4 - 3,46 Ghz				
to:
Added lines 163-165:

Pentium D Pentium 4 Celeron

Added lines 167-169:

2,66 - 3,6 Ghz 2,66 - 3,8 Ghz 2,4 - 3,46 Ghz

Changed lines 174-177 from:
			Pentium D	2,66 - 3,6 Ghz				
			Pentium 4	2,66 - 3,8 Ghz				
			Celeron	2,4 - 3,46 Ghz				
to:
March 20, 2007, at 09:18 AM by 81.188.94.80 -
Changed lines 32-34 from:

(:cell:) Pentium III

to:

(:cell:) Pentium III Pentium II Celeron

Changed lines 36-40 from:

(:cell:) 133 Mhz

to:

233 - 450 Mhz 266 - 433 Mhz (:cell:) 133 Mhz 133 Mhz 133 Mhz

Changed lines 44-45 from:
			Pentium II	233 - 450 Mhz	133 Mhz			
			Celeron	266 - 433 Mhz	133 Mhz			
to:
March 20, 2007, at 09:17 AM by 81.188.94.80 -
Deleted line 132:

(:cell:)

Changed lines 137-138 from:

(:cellnr:)Viper AMD K6-2 333 mhz 100 Mhz 168 pin Dimm 100 /133 mhz (:cellnr:)J2 12ich pos600 socket 370 PPGA PIII 133/100/66 Mhz 168 pin Dimm 66/100/133 MHZ

to:

(:cellnr:)Viper (:cell:) (:cell:) (:cell:) AMD K6-2 (:cell:) 333 mhz (:cell:) 100 Mhz (:cell:) 168 pin Dimm (:cell:) 100 /133 mhz (:cell:)

(:cellnr:)J2 12ich (:cell:) pos600 (:cell:) socket 370 PPGA (:cell:) PIII (:cell:) (:cell:) 133/100/66 Mhz (:cell:) 168 pin Dimm (:cell:) 66/100/133 MHZ (:cell:)

Changed lines 157-165 from:

(:cellnr:)J2 15 inch Pos605 socket 370 PPGA PIII 133/100/66 Mhz 168 pin Dimm 66/100/133 MHZ

to:

(:cellnr:)J2 15 inch (:cell:) Pos605 (:cell:) socket 370 PPGA (:cell:) PIII (:cell:) (:cell:) 133/100/66 Mhz (:cell:) 168 pin Dimm (:cell:) 66/100/133 MHZ (:cell:)

Changed lines 167-172 from:

(:cellnr:)IBM surepos 4840-541 Amd K6-2 400 Mhz 168 pin Dimm 100 Mhz (:cellnr:)IBM surepos 4840-543 Celeron 2 ghz DDR SDRAM 266 Mhz (:cellnr:)Tec - st60 Celeron 168 pin Dimm (:cellnr:)Tec - St71 Celeron 2 ghz DDR SDRAM 333/266 Mhz (:cellnr:)Ncr Socket 479 mPGA Celeron M 1,3 Ghz DDR SDRAM 333 Mhz

to:

(:cellnr:)IBM surepos 4840-541 (:cell:) (:cell:) (:cell:) Amd K6-2 (:cell:) 400 Mhz (:cell:) (:cell:) 168 pin Dimm (:cell:) 100 Mhz (:cell:)

(:cellnr:)IBM surepos 4840-543 (:cell:) (:cell:) (:cell:) Celeron (:cell:) 2 ghz (:cell:) (:cell:) DDR SDRAM (:cell:) 266 Mhz

(:cellnr:)Tec - st60 (:cell:) (:cell:) (:cell:) Celeron (:cell:) (:cell:) (:cell:) 168 pin Dimm (:cell:) (:cell:)

(:cellnr:)Tec - St71 (:cell:) (:cell:) (:cell:) Celeron (:cell:) 2 ghz (:cell:) (:cell:) DDR SDRAM (:cell:) 333/266 Mhz (:cell:) (:cellnr:)Ncr (:cell:) (:cell:) Socket 479 mPGA (:cell:) Celeron M (:cell:) 1,3 Ghz (:cell:) (:cell:) DDR SDRAM (:cell:) 333 Mhz (:cell:)

March 20, 2007, at 09:04 AM by 81.188.94.80 -
Changed lines 29-37 from:

(:cellnr:)Intel 440bx2 SE440BX2 Slot 1 Pentium III 450 - 850 Mhz 133 Mhz 168 pin Dimm 66 /100 Mhz 4S4EB2X0.86A.0024.P17

to:

(:cellnr:)Intel 440bx2 (:cell:) SE440BX2 (:cell:) Slot 1 (:cell:) Pentium III (:cell:) 450 - 850 Mhz (:cell:) 133 Mhz (:cell:) 168 pin Dimm (:cell:) 66 /100 Mhz (:cell:) 4S4EB2X0.86A.0024.P17

Changed lines 40-48 from:

(:cellnr:)MSI 440BX MS-6163 Slot 1 Pentium II 233 - 450 mhz 133mhz 168 pin Dimm 66/100/133 Mhz 2,7

to:

(:cellnr:)MSI 440BX (:cell:) MS-6163 (:cell:) Slot 1 (:cell:) Pentium II (:cell:) 233 - 450 mhz (:cell:) 133mhz (:cell:) 168 pin Dimm (:cell:) 66/100/133 Mhz (:cell:) 2,7

Changed lines 50-58 from:

(:cellnr:)Cayman 810 ca810/ socket 370 PPGA Petium III 500 - 850 Mhz 100 Mhz 168 pin Dimm 100 Mhz P12

to:

(:cellnr:)Cayman 810 (:cell:) ca810 (:cell:) socket 370 PPGA (:cell:) Pentium III (:cell:) 500 - 850 Mhz (:cell:) 100 Mhz (:cell:) 168 pin Dimm (:cell:) 100 Mhz (:cell:) P12

Changed lines 60-68 from:

(:cellnr:)Fayet 815 D815EEA socket 370 PPGA Pentium III 500 - 1000 Mhz 100/133 Mhz 168 pin Dimm 100 /133 Mhz P11

to:

(:cellnr:)Fayet 815 (:cell:) D815EEA (:cell:) socket 370 PPGA (:cell:) Pentium III (:cell:) 500 - 1000 Mhz (:cell:) 100/133 Mhz (:cell:) 168 pin Dimm (:cell:) 100 /133 Mhz (:cell:) P11

Changed lines 70-78 from:

(:cellnr:)Sebreaze 845 d845gvsr Socket 478 mPGA Pentium 4 1,4 - 3,6 Ghz 533/400 Mhz DDR SDRAM 333/266/200 VA84510A.86A

to:

(:cellnr:)Sebreaze 845 (:cell:) d845gvsr (:cell:) Socket 478 mPGA (:cell:) Pentium 4 (:cell:) 1,4 - 3,6 Ghz (:cell:) 533/400 Mhz (:cell:) DDR SDRAM (:cell:) 333/266/200 (:cell:) VA84510A.86A

Changed lines 81-89 from:

(:cellnr:)Rexburg 845 D845GERG2 Socket 478 mPGA Pentium 4 1,4 - 3,06 Ghz 533/400 Mhz DDR SDRAM 333/266 RG84510A.86A.0033.P17.EB

to:

(:cellnr:)Rexburg 845 (:cell:) D845GERG2 (:cell:) Socket 478 mPGA (:cell:) Pentium 4 (:cell:) 1,4 - 3,06 Ghz (:cell:) 533/400 Mhz (:cell:) DDR SDRAM (:cell:) 333/266 (:cell:) RG84510A.86A.0033.P17.EB

Changed lines 91-99 from:

(:cellnr:)865 Perl D865PERL Socket 478 mPGA Pentium 4 1,6 -2,4Ghz 800/533/400 Mhz DDR SDRAM 400/333/266 RL86510A.86A.0089.P21

to:

(:cellnr:)865 Perl (:cell:) D865PERL (:cell:) Socket 478 mPGA (:cell:) Pentium 4 (:cell:) 1,6 -2,4Ghz (:cell:) 800/533/400 Mhz (:cell:) DDR SDRAM (:cell:) 400/333/266 (:cell:) RL86510A.86A.0089.P21

Changed lines 102-110 from:

(:cellnr:)BTX 915 D915GMH LGA775 (socket T) Pentium 4 2,66 - 3,8 Ghz 800/533 Mhz DDR SDRAM 400/333 482

to:

(:cellnr:)BTX 915 (:cell:) D915GMH (:cell:) LGA775 (socket T) (:cell:) Pentium 4 (:cell:) 2,66 - 3,8 Ghz (:cell:) 800/533 Mhz (:cell:) DDR SDRAM (:cell:) 400/333 (:cell:) 482

Changed lines 112-120 from:

(:cellnr:)BTX 965 DQ965CO LGA775 (socket T) Core2duo 1,8 - 2,66 Ghz 1066/800/533 Mhz DDR2 Sdram 800/667/553

to:

(:cellnr:)BTX 965 (:cell:) DQ965CO (:cell:) LGA775 (socket T) (:cell:) Core2duo (:cell:) 1,8 - 2,66 Ghz (:cell:) 1066/800/533 Mhz (:cell:) DDR2 Sdram (:cell:) 800/667/553 (:cell:)

Changed lines 124-133 from:

(:cellnr:)Core2Duo 965 DQ965GF LGA775 (socket T) Core2duo 1,8 - 2,66 Ghz 1066/800/533 Mhz DDR2 Sdram 800/667/553

to:

(:cellnr:)Core2Duo 965 (:cell:) DQ965GF (:cell:) LGA775 (socket T) (:cell:) Core2duo (:cell:) 1,8 - 2,66 Ghz (:cell:) 1066/800/533 Mhz (:cell:) DDR2 Sdram (:cell:) 800/667/553 (:cell:) (:cell:)

March 20, 2007, at 08:56 AM by 81.188.94.80 -
Changed lines 26-27 from:

(:tableend:)

to:
Changed line 29 from:

Intel 440bx2 SE440BX2 Slot 1 Pentium III 450 - 850 Mhz 133 Mhz 168 pin Dimm 66 /100 Mhz 4S4EB2X0.86A.0024.P17

to:

(:cellnr:)Intel 440bx2 SE440BX2 Slot 1 Pentium III 450 - 850 Mhz 133 Mhz 168 pin Dimm 66 /100 Mhz 4S4EB2X0.86A.0024.P17

Changed line 32 from:

MSI 440BX MS-6163 Slot 1 Pentium II 233 - 450 mhz 133mhz 168 pin Dimm 66/100/133 Mhz 2,7

to:

(:cellnr:)MSI 440BX MS-6163 Slot 1 Pentium II 233 - 450 mhz 133mhz 168 pin Dimm 66/100/133 Mhz 2,7

Changed line 34 from:

Cayman 810 ca810/ socket 370 PPGA Petium III 500 - 850 Mhz 100 Mhz 168 pin Dimm 100 Mhz P12

to:

(:cellnr:)Cayman 810 ca810/ socket 370 PPGA Petium III 500 - 850 Mhz 100 Mhz 168 pin Dimm 100 Mhz P12

Changed line 36 from:

Fayet 815 D815EEA socket 370 PPGA Pentium III 500 - 1000 Mhz 100/133 Mhz 168 pin Dimm 100 /133 Mhz P11

to:

(:cellnr:)Fayet 815 D815EEA socket 370 PPGA Pentium III 500 - 1000 Mhz 100/133 Mhz 168 pin Dimm 100 /133 Mhz P11

Changed line 38 from:

Sebreaze 845 d845gvsr Socket 478 mPGA Pentium 4 1,4 - 3,6 Ghz 533/400 Mhz DDR SDRAM 333/266/200 VA84510A.86A

to:

(:cellnr:)Sebreaze 845 d845gvsr Socket 478 mPGA Pentium 4 1,4 - 3,6 Ghz 533/400 Mhz DDR SDRAM 333/266/200 VA84510A.86A

Changed line 41 from:

Rexburg 845 D845GERG2 Socket 478 mPGA Pentium 4 1,4 - 3,06 Ghz 533/400 Mhz DDR SDRAM 333/266 RG84510A.86A.0033.P17.EB

to:

(:cellnr:)Rexburg 845 D845GERG2 Socket 478 mPGA Pentium 4 1,4 - 3,06 Ghz 533/400 Mhz DDR SDRAM 333/266 RG84510A.86A.0033.P17.EB

Changed line 43 from:

865 Perl D865PERL Socket 478 mPGA Pentium 4 1,6 -2,4Ghz 800/533/400 Mhz DDR SDRAM 400/333/266 RL86510A.86A.0089.P21

to:

(:cellnr:)865 Perl D865PERL Socket 478 mPGA Pentium 4 1,6 -2,4Ghz 800/533/400 Mhz DDR SDRAM 400/333/266 RL86510A.86A.0089.P21

Changed line 46 from:

BTX 915 D915GMH LGA775 (socket T) Pentium 4 2,66 - 3,8 Ghz 800/533 Mhz DDR SDRAM 400/333 482

to:

(:cellnr:)BTX 915 D915GMH LGA775 (socket T) Pentium 4 2,66 - 3,8 Ghz 800/533 Mhz DDR SDRAM 400/333 482

Changed line 48 from:

BTX 965 DQ965CO LGA775 (socket T) Core2duo 1,8 - 2,66 Ghz 1066/800/533 Mhz DDR2 Sdram 800/667/553

to:

(:cellnr:)BTX 965 DQ965CO LGA775 (socket T) Core2duo 1,8 - 2,66 Ghz 1066/800/533 Mhz DDR2 Sdram 800/667/553

Changed line 52 from:

Core2Duo 965 DQ965GF LGA775 (socket T) Core2duo 1,8 - 2,66 Ghz 1066/800/533 Mhz DDR2 Sdram 800/667/553

to:

(:cellnr:)Core2Duo 965 DQ965GF LGA775 (socket T) Core2duo 1,8 - 2,66 Ghz 1066/800/533 Mhz DDR2 Sdram 800/667/553

Changed lines 57-58 from:

Viper AMD K6-2 333 mhz 100 Mhz 168 pin Dimm 100 /133 mhz J2 12ich pos600 socket 370 PPGA PIII 133/100/66 Mhz 168 pin Dimm 66/100/133 MHZ

to:

(:cellnr:)Viper AMD K6-2 333 mhz 100 Mhz 168 pin Dimm 100 /133 mhz (:cellnr:)J2 12ich pos600 socket 370 PPGA PIII 133/100/66 Mhz 168 pin Dimm 66/100/133 MHZ

Changed line 60 from:

J2 15 inch Pos605 socket 370 PPGA PIII 133/100/66 Mhz 168 pin Dimm 66/100/133 MHZ

to:

(:cellnr:)J2 15 inch Pos605 socket 370 PPGA PIII 133/100/66 Mhz 168 pin Dimm 66/100/133 MHZ

Changed lines 62-66 from:

IBM surepos 4840-541 Amd K6-2 400 Mhz 168 pin Dimm 100 Mhz IBM surepos 4840-543 Celeron 2 ghz DDR SDRAM 266 Mhz Tec - st60 Celeron 168 pin Dimm Tec - St71 Celeron 2 ghz DDR SDRAM 333/266 Mhz Ncr Socket 479 mPGA Celeron M 1,3 Ghz DDR SDRAM 333 Mhz

to:

(:cellnr:)IBM surepos 4840-541 Amd K6-2 400 Mhz 168 pin Dimm 100 Mhz (:cellnr:)IBM surepos 4840-543 Celeron 2 ghz DDR SDRAM 266 Mhz (:cellnr:)Tec - st60 Celeron 168 pin Dimm (:cellnr:)Tec - St71 Celeron 2 ghz DDR SDRAM 333/266 Mhz (:cellnr:)Ncr Socket 479 mPGA Celeron M 1,3 Ghz DDR SDRAM 333 Mhz

(:tableend:)

March 20, 2007, at 08:55 AM by 81.188.94.80 -
Changed lines 16-24 from:

(:cell:) Pentium III
Pentium II
(:cell:) 450Mhz
233 - 450 Mhz
(:cell:) 133 Mhz
133 Mhz \\

to:

(:cell:) Pentium III Pentium II (:cell:)450Mhz 233 - 450 Mhz (:cell:) 133 Mhz 133 Mhz

March 20, 2007, at 08:54 AM by 81.188.94.80 -
Changed lines 17-18 from:

Pentium III Pentium II

to:

Pentium III
Pentium II \\

Changed lines 20-21 from:

450Mhz 233 - 450 Mhz

to:

450Mhz
233 - 450 Mhz \\

Changed lines 23-24 from:

133 Mhz 133 Mhz

to:

133 Mhz
133 Mhz \\

March 20, 2007, at 08:53 AM by 81.188.94.80 -
Changed lines 16-21 from:

(:cell:) Pentium III

         Pentium II

(:cell:) 450Mhz

         233 - 450 Mhz

(:cell:) 133 Mhz

         133 Mhz	
to:

(:cell:) Pentium III Pentium II (:cell:) 450Mhz 233 - 450 Mhz (:cell:) 133 Mhz 133 Mhz

March 20, 2007, at 08:52 AM by 81.188.94.80 -
Changed line 17 from:

Pentium II

to:
         Pentium II
Changed line 19 from:

233 - 450 Mhz

to:
         233 - 450 Mhz
Changed line 21 from:

133 Mhz

to:
         133 Mhz	
March 20, 2007, at 08:52 AM by 81.188.94.80 -
Added line 17:

Pentium II

Added line 19:

233 - 450 Mhz

Added line 21:

133 Mhz

Added lines 28-29:

Intel 440bx2 SE440BX2 Slot 1 Pentium III 450 - 850 Mhz 133 Mhz 168 pin Dimm 66 /100 Mhz 4S4EB2X0.86A.0024.P17

Deleted lines 30-31:

Intel 440bx2 SE440BX2 Slot 1 Pentium III 450 - 850 Mhz 133 Mhz 168 pin Dimm 66 /100 Mhz 4S4EB2X0.86A.0024.P17

			Pentium II	233 - 450 Mhz	133 Mhz			
March 20, 2007, at 08:51 AM by 81.188.94.80 -
Added lines 22-24:

(:tableend:)

Deleted line 63:

(:tableend:)

March 20, 2007, at 08:50 AM by 81.188.94.80 -
Changed lines 1-18 from:

Motherboard link CPU Slot Cpu model CpU speed CPU Bus Memory Type Memory Speed Latest Bios

Intel 440bx SE440BX Slot 1 Pentium III 450Mhz 133 Mhz 168 pin Dimm 66 /100 Mhz P11

to:

(:table border=1 cellpadding=5 cellspacing=0:)

(:cell:) Motherboard (:cell:) link (:cell:) CPU Slot (:cell:) Cpu model (:cell:) CpU speed (:cell:) CPU Bus (:cell:) Memory Type (:cell:) Memory Speed (:cell:) Latest Bios

(:cellnr:)Intel 440bx (:cell:) SE440BX (:cell:) Slot 1 (:cell:) Pentium III (:cell:) 450Mhz (:cell:) 133 Mhz (:cell:) 168 pin Dimm (:cell:) 66 /100 Mhz (:cell:) P11

			Pentium II	233 - 450 Mhz	133 Mhz			

Intel 440bx2 SE440BX2 Slot 1 Pentium III 450 - 850 Mhz 133 Mhz 168 pin Dimm 66 /100 Mhz 4S4EB2X0.86A.0024.P17

			Pentium II	233 - 450 Mhz	133 Mhz			
			Celeron	266 - 433 Mhz	133 Mhz			

MSI 440BX MS-6163 Slot 1 Pentium II 233 - 450 mhz 133mhz 168 pin Dimm 66/100/133 Mhz 2,7

			Celeron	233 - 450 mhz	133 Mhz			

Cayman 810 ca810/ socket 370 PPGA Petium III 500 - 850 Mhz 100 Mhz 168 pin Dimm 100 Mhz P12

			Celeron	366 - 700 Mhz	66 Mhz			

Fayet 815 D815EEA socket 370 PPGA Pentium III 500 - 1000 Mhz 100/133 Mhz 168 pin Dimm 100 /133 Mhz P11

			Celeron	500 - 800 Mhz				

Sebreaze 845 d845gvsr Socket 478 mPGA Pentium 4 1,4 - 3,6 Ghz 533/400 Mhz DDR SDRAM 333/266/200 VA84510A.86A

			Celeron D	2,3 - 3,6 Ghz	533 Mhz			
			Celeron	1,7 - 2,8 Ghz	400 Mhz			

Rexburg 845 D845GERG2 Socket 478 mPGA Pentium 4 1,4 - 3,06 Ghz 533/400 Mhz DDR SDRAM 333/266 RG84510A.86A.0033.P17.EB

			Celeron	1,7 - 2,8 Ghz				

865 Perl D865PERL Socket 478 mPGA Pentium 4 1,6 -2,4Ghz 800/533/400 Mhz DDR SDRAM 400/333/266 RL86510A.86A.0089.P21

			Celeron D	2,26 -3,06Ghz	533 Mhz			
			Celeron	2,0 - 2,8 Ghz	400 Mhz			

BTX 915 D915GMH LGA775 (socket T) Pentium 4 2,66 - 3,8 Ghz 800/533 Mhz DDR SDRAM 400/333 482

			celeron D	2,13 - 3,6 Ghz	533 Mhz			

BTX 965 DQ965CO LGA775 (socket T) Core2duo 1,8 - 2,66 Ghz 1066/800/533 Mhz DDR2 Sdram 800/667/553

			Pentium D	2,66 - 3,6 Ghz				
			Pentium 4	2,66 - 3,8 Ghz				
			Celeron	2,4 - 3,46 Ghz				

Core2Duo 965 DQ965GF LGA775 (socket T) Core2duo 1,8 - 2,66 Ghz 1066/800/533 Mhz DDR2 Sdram 800/667/553

			Pentium D	2,66 - 3,6 Ghz				
			Pentium 4	2,66 - 3,8 Ghz				
			Celeron	2,4 - 3,46 Ghz				

Viper AMD K6-2 333 mhz 100 Mhz 168 pin Dimm 100 /133 mhz J2 12ich pos600 socket 370 PPGA PIII 133/100/66 Mhz 168 pin Dimm 66/100/133 MHZ

			Celeron					

J2 15 inch Pos605 socket 370 PPGA PIII 133/100/66 Mhz 168 pin Dimm 66/100/133 MHZ

			Celeron					

IBM surepos 4840-541 Amd K6-2 400 Mhz 168 pin Dimm 100 Mhz IBM surepos 4840-543 Celeron 2 ghz DDR SDRAM 266 Mhz Tec - st60 Celeron 168 pin Dimm Tec - St71 Celeron 2 ghz DDR SDRAM 333/266 Mhz Ncr Socket 479 mPGA Celeron M 1,3 Ghz DDR SDRAM 333 Mhz (:tableend:)

March 20, 2007, at 08:43 AM by 81.188.94.80 -
Added lines 1-18:

Motherboard link CPU Slot Cpu model CpU speed CPU Bus Memory Type Memory Speed Latest Bios

Intel 440bx SE440BX Slot 1 Pentium III 450Mhz 133 Mhz 168 pin Dimm 66 /100 Mhz P11

March 19, 2007, at 04:59 PM by 81.188.94.80 -
Deleted lines 0-19:

(:table border=1 cellpadding=5 cellspacing=0:) (:cell:) a1 zrzr sfsdf sdfsdfs sdfsdf sfsdf (:cell:) b1 (:cell:) c1 (:cell:) d1 (:cell:) b2 (:cell:) c2 (:cell:) d2

(:cellnr:) a2 (:cell:) b2 (:cell:) c2 (:cell:) d2

(:tableend:)

March 19, 2007, at 04:57 PM by 81.188.94.80 -
Added lines 4-7:

sfsdf sdfsdfs sdfsdf sfsdf

March 19, 2007, at 04:57 PM by 81.188.94.80 -
Changed lines 2-3 from:

test (:cell:) a1 ==test==

to:

(:cell:) a1 zrzr

March 19, 2007, at 04:57 PM by 81.188.94.80 -
Changed line 2 from:
  1 (:cell:) a1   ==test==
to:

test (:cell:) a1 ==test==

March 19, 2007, at 04:56 PM by 81.188.94.80 -
Changed line 2 from:

(:cell:) a1 ==test==

to:
  1 (:cell:) a1   ==test==
March 19, 2007, at 04:56 PM by 81.188.94.80 -
Changed line 2 from:

(:cell:) a1 ;;test

to:

(:cell:) a1 ==test==

March 19, 2007, at 04:56 PM by 81.188.94.80 -
Changed line 2 from:

(:cell:) a1

to:

(:cell:) a1 ;;test

March 19, 2007, at 04:46 PM by 81.188.94.80 -
Changed lines 2-3 from:

(:cell:) a1 \\test (:cell:) b1 \\test

to:

(:cell:) a1 (:cell:) b1

March 19, 2007, at 04:45 PM by 81.188.94.80 -
Changed lines 2-3 from:

(:cell1:) a1 (:cell:) b1

to:

(:cell:) a1 \\test (:cell:) b1 \\test

March 19, 2007, at 04:44 PM by 81.188.94.80 -
Changed line 2 from:

(:cell:) a1

to:

(:cell1:) a1

March 19, 2007, at 04:44 PM by 81.188.94.80 -
Deleted lines 5-6:

(:cellnr:) a2

March 19, 2007, at 04:43 PM by 81.188.94.80 -
Deleted line 1:

(:cellnr:) a1

Added lines 11-16:

(:cellnr:) a2 (:cell:) b2 (:cell:) c2 (:cell:) d2

March 19, 2007, at 04:42 PM by 81.188.94.80 -
Changed lines 1-4 from:
to:

(:table border=1 cellpadding=5 cellspacing=0:) (:cellnr:) a1 (:cell:) a1 (:cell:) b1 (:cell:) c1 (:cell:) d1

(:cellnr:) a2 (:cell:) b2 (:cell:) c2 (:cell:) d2 (:tableend:)

March 15, 2007, at 05:03 PM by 81.188.94.80 -
Changed line 4 from:
pin 1
to:
March 15, 2007, at 05:02 PM by 81.188.94.80 -
Changed line 4 from:
pin 1+12V (input)
to:
pin 1
March 15, 2007, at 05:02 PM by 81.188.94.80 -
Changed lines 3-5 from:
to:
pin 1+12V (input)
March 15, 2007, at 05:02 PM by 81.188.94.80 -
March 15, 2007, at 05:02 PM by 81.188.94.80 -
Changed line 5 from:
pin 1+12V (input)
to:
March 15, 2007, at 05:02 PM by 81.188.94.80 -
Changed line 5 from:
pin 1+12V (input)
to:
pin 1+12V (input)
March 15, 2007, at 05:01 PM by 81.188.94.80 -
Changed lines 1-5 from:
to:
pin 1+12V (input)
March 15, 2007, at 04:49 PM by 81.188.94.80 -
Added line 1:
March 15, 2007, at 04:47 PM by 81.188.94.80 -
Deleted lines 0-6:
17 + 8RTS2 CTS2 + CD1
23Rx Tx
32Tx Rx
46DTR DSR
55Signal ground
64DSR DTR
7 + 81RTS1 CTS1 + CD2
March 15, 2007, at 04:47 PM by 81.188.94.80 -
Deleted line 0:
Connector 1Connector 2Function
March 15, 2007, at 04:46 PM by 81.188.94.80 -
Deleted line 0:
March 15, 2007, at 04:46 PM by 81.188.94.80 -
Added lines 1-9:
Connector 1Connector 2Function
17 + 8RTS2 CTS2 + CD1
23Rx Tx
32Tx Rx
46DTR DSR
55Signal ground
64DSR DTR
7 + 81RTS1 CTS1 + CD2
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Page last modified on April 16, 2007, at 03:50 PM